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Talk to an Expert| Category | Assignment | Subject | Engineering |
|---|---|---|---|
| University | Liverpool John Moores University (LJMU) | Module Title | 6406ELE Further Electronic Design |
| Module Name | Further Electronic Design |
| Module Code | 6406ELE |
| Level | 6 |
| Weighting | 100% |
| Issue Date | Week 24, 2026 |
| Hand-in Date | 01 May 2026 |
| Feedback | Written feedback within three weeks; verbal feedback during one-to-one interview |
| Programme | BEng (Hons) Electrical and Electronics Engineering |
The objective is to design the finite state machine for a washing machine.
In this assignment, students are required to:
LO1 Evaluate digital system design and integration including ALUs and FSMs.
LO2 Design, simulate, test and implement programmable logic based systems using VHDL.
LO3 Design and implement microprocessor based analogue and digital systems.
LO4 Design peripheral components for digital and analogue systems power supplies, bus structures, memories and interfacing/signal processing circuits.
This assignment will assess elements of the above learning outcomes.
This coursework contains parts.
In this part, you are required to design a washing machine controller (WMC) using a Finite State Machine (FSM). The machine follows the sequences through the following 4 stages:
Soak è Wash è Rinse è Spin
To simplify your design, you can assume the transition between two stages is achieved by pressing one push button. You can also use some of the LEDs as the indicator for the current stage. Finally, your design should be simulated in Xilinx VIVADO software using VHDL.
You are required to re-design your washing machine controller (WMC) using a Finite State Machine to achieve a more complex system. As a minimum requirement, the machine follows the sequences through the following 4 stages:
Soak è Wash è Rinse è Spin
There is a “double wash” switch, which, if turned on, leads to a second wash and rinse cycle to occur. In other words, the “double wash” switch causes the following 6-stage sequence:
Soak è Wash èRinse è Wash è Rinse èSpin The amount of time for each stage is as below:
Soak: 1sec; Wash: 3sec; Rinse: 5sec.
You should use the 100 MHz clock signal as the clock signal of your state machine to control the timing of cycling, and to display the time on the 7-segment display units.
You should implement the design in Xilinx VIVADO and simulate and verify the functionalities. Use some of the 8 LEDs as the indicator of the current stage. Also you can use push buttons to simulate laundry token deposition and the “double wash” switch.
You are encouraged to improve your design to build a more realistic washing machine controller. For example, in practice, for safety consideration, if the lid of the machine is raised during the spin stage, the machine needs to stop spinning immediately until the lid is closed. The on-board switch needs to be selected and used as the input to start/stop the Washing machine. Add more functions to your design such as temperature sensor and control, level sensor and control, washing load selection, different washing programs, etc. You are encouraged to research the technical details of different sensors, actuators, motor signals, and their control and interfaces.
You should design the washing machine controller in VHDL.
You are required to re-design your washing machine controller (WMC) using an embedded PicoBlaze microcontroller together with the signal from sensors and actuators. You are required to implement your design by writing program for the microcontroller with the Assembly language. Your design should be simulated in the Xilinx VIVADO software.
The washing machine controller should include the following functions:
Soak è Wash è Rinse è Spin
You are encouraged to improve your design to build a more realistic washing machine controller.
Once you have completed the designs, prepare for the submission process. You are required to submit a one coursework report and the project files.
Wherein, your project source files should allow the tutor to reproduce the simulation results you show in the report. The report should be less than 15 pages (excluding cover page and table of contents), including the followings.
Please refer to the report marking scheme for the detailed requirements.
If your circuit is not completely functional by the due date, you should hand in what you have got in order to receive partial credit. Late submission will be penalized.
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Introduction and Analysis (10%) Has a clear set of aims and objectives been presented? Has a detailed description of the design been included? |
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| Circuit Design and Validation (40%)
Part 1: 30% Part 2: 50% Part 3: 20% Have the structure and functionality of the design in digital hardware been clearly explained? Has the design been carried out following the correct procedure and the result clearly explained in hardware circuit? Have the simulation results been clearly presented and explained in corresponding hardware circuits? |
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| VHDL and Assembly Design Result (40%)
Part 1: 30% Part 2: 50% Part 3: 20% Have the structure and functionality of the design been clearly explained using flowchart and block diagrams? Has the VHDL and ASM source code been clearly commented on and explained in terms of functionality? Have the simulation results been clearly presented and explained in terms of functionality and performance? Have the cell usage been extracted and presented? |
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| Conclusions and Report Quality (10%)
Has a reasoned evaluation been made of the work in the report? Have rational and appropriate conclusions been drawn |
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| Comments: |
Your work must be of outstanding quality and fully meet the requirements of the coursework specification and learning outcomes stated. You must show independent thinking and apply this to your work showing originality and consideration of key issues. There must be evidence of wider reading on the subject.
Key words which may describe a coursework at this level include: appraises, compares, concludes, contrasts, criticizes, critiques, defends, discriminates, evaluates, explains, interprets, justifies, relates, supports.
Your work must be of good quality and meet the requirements of the coursework specification and learning outcomes stated. You must demonstrate some originality in your work and show this by applying new learning to the key issues of the coursework. There must be evidence of wider reading on the subject.
Key words which may describe a coursework at this level include: categorizes, combines, compiles, creates, devises, generates, modifies, reconstructs, identifies, illustrates, outlines, synthesizes.
Your work must be comprehensive and meet all of the requirements stated by the coursework specification and learning outcomes. You must show a good understanding of the key concepts and be able to apply them to solve the problem set by the coursework. There must be enough depth to your work to provide evidence of wider reading.
Key words which may describe a coursework at this level include: demonstrates, changes, applies, operates, produces, predicts, shows, solves, uses, translates, comprehends, converts, generalizes.
Your work must be of a standard that meets the requirements stated by the coursework specification and learning outcomes. You must show a reasonable level of understanding of the key concepts and principles and you must have applied this knowledge to the coursework problem. There should be some evidence of wider reading.
Key words which may describe a coursework at this level include: comprehends, defines, describes, identifies, knows, labels, lists, matches, outlines, recalls, recognizes, reproduces, selects, states, rewrites.
Your work is of poor quality and does not meet the requirements stated by the coursework specification and learning outcomes. There is a lack of understanding of key concepts and knowledge and no evidence of wider reading.
If something serious happens that means that you will not be able to complete this assignment, you need to contact the module leader as soon as possible. There are a number of things that can be done to help, such as extensions, waivers and alternative assessments, but we can only arrange this if you tell us. To ensure that the system is not abused, you will need to provide some evidence of the problem. More guidance is available at http://www.ljmu.ac.uk/corporate/SPR/60399.htm.
Coursework, which is submitted up to 5 working days late (except where there is an agreed extension) will be capped at the pass mark for the module. Coursework submitted after this period (except where there is an agreed extension) will be recorded as a non-submission.
The University defines Academic Misconduct as ‘any case of deliberate, premeditated cheating, collusion, plagiarism or falsification of information, in an attempt to deceive and gain an unfair advantage in assessment’. The School takes Academic Misconduct very seriously and any suspected cases will be investigated through the University’s standard policy (Academic Misconduct Policy). If you are found guilty, you may be expelled from the University with no award.
It is your responsibility to ensure that you understand what constitutes Academic Misconduct and to ensure that you do not break the rules. If you are unclear about what is required, please ask.
Cheating includes:
Plagiarism is defined as the representation of the work, artefacts or designs, written or otherwise, of any other person, from any source whatsoever, as the student’s own. Examples of plagiarism may be as follows:
Collusion includes:
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